YSS932 Datasheet, PDF (16/23 Pages) YAMAHA CORPORATION – 96kHz DIR + Dolby Digital / Pro Logic II / DTS decoder + Sub DSP

YSS932
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
|
0x57
0x58
|
0x7F
MI0
MI1
MI2
MI3
MI4
MI5
MI6
MI7
DIR CTRL
DIR SDO
DIR PIN
DIR INTMOD
(TEST)
DIR CUADR
DIR CUDAT
DIR STATUS
DIR FS
(TEST)
Invalid
MI0REG7-0
MI1REG7-0
MI2REG7-0
MI3REG7-0
MI4REG7-0
MI5REG7-0
MI6REG7-0
MI7REG7-0
CKMOD VUCMUTE SDOMUTE
LOCKMOD1-0
DIROFMT1-0
DIROBIT1-0
BSMOD VMOD UMOD CMOD
INTMOD6-1
DDINSEL1-0
DIROWP DIROBP
CTIMMOD
DHLD
R/L
U/C
DIRINT DIRERR LOCKN
CUDAT7-0
VFLAG CSB1
CSB3
CUADR4-0
CSCHG BSFLAG (Undefined)
DIRFS2-0
The output at the SO pin becomes High-Z.
Never write "1" into the shaded bits because the bits for testing are assigned there.
Never make an access to addresses 0x06, 0x07, 0x31, 0x37, 0x44, 0x49 to 0x57 because the registers for
testing are assigned there.
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