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XQ4000E Datasheet, PDF (32/36 Pages) Xilinx, Inc – System Performance beyond 60 MHz
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QPRO XQ4000E/EX QML High-Reliability FPGAs
R
CB191/196 Package for XQ4010E
Pin Description
Bound
PG191 CB196 Scan
GND
D4
P1
-
PGCK1_(A16*I/0)
C3
P2
122
I/O_(A17)
C4
P3
125
I/0
B3
P4
128
-
-
P5(1)
-
I/O
C5
P6
131
I/O_(TDI)
A2
P7
134
I/O_(TCK)
B4
P8
137
I/O
C6
P9
140
I/O
A3
P10
143
I/O
B5
P11
146
I/O
B6
P12
149
GND
C7
P13
-
I/O
A4
P14
152
I/O
A5
P15
155
I/O_(TMS)
B7
P16
158
I/O
A6
P17
161
I/O
C8
P18
164
I/O
A7
P19
167
I/O
B8
P20
170
I/O
A8
P21
173
I/O
B9
P22
176
I/O
C9
P23
179
GND
D9
P24
-
VCC
D10
P25
-
I/O
C10
P26
182
I/O
B10
P27
185
I/O
A9
P28
-
I/O
A10
P29
191
I/O
A11
P30
194
I/O
C11
P31
197
I/O
B11
P32
200
I/O
A12
P33
203
Notes:
1. Indicates unconnected package pins.
2. Contributes only one bit (.I) to the boundary scan register.
Boundary Scan Bit 0 = TD0.T
Boundary Scan Bit 1 = TD0.0
Boundary Scan Bit 487 = BSCAN.UPD
Pin Description
Bound
PG191 CB196 Scan
I/O
B12
P34
206
I/O
A13
P35
209
GND
C12
P36
-
I/O
B13
P37
212
I/O
A14
P38
215
I/O
A15
P39
218
I/O
C13
P40
221
I/O
B14
P41
224
I/O
A16
P42
227
I/O
B15
P43
230
I/O
C14
P44
233
I/O
A17
P45
236
SCGK2_(I/O)
B16
P46
239
M1
C15
P47
242
GND
M0
D15
P48
-
A18
P49 245(2)
VCC
M2
D16
P50
-
C16
P51 246(2)
PGCK2_(I/O)
B17
P52
247
I/O_(HDC)
E16
P53
250
-
-
P54(1)
-
I/O
C17
P55
253
I/0
D17
P56
256
I/O
B18
P57
259
I/O_(LDC)
E17
P58
262
I/O
F16
P59
265
I/O
C18
P60
268
I/O
D18
P61
271
I/O
F17
P62
274
GND
G16 P63
-
I/O
E18
P64
277
I/O
F18
P65
280
I/O
G17
P66
283
I/O
G18
P67
286
Notes:
1. Indicates unconnected package pins.
2. Contributes only one bit (.I) to the boundary scan register.
Boundary Scan Bit 0 = TD0.T
Boundary Scan Bit 1 = TD0.0
Boundary Scan Bit 487 = BSCAN.UPD
32
www.xilinx.com
DS021 (v2.2) June 25, 2000
1-800-255-7778
Product Specification
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