XC3100A Datasheet, PDF (3/8 Pages) Xilinx, Inc – Ultra-high-speed FPGA family with six members

DC Characteristics Over Operating Conditions
Symbol Description
Min Max Units
V_OH
V_OL
V_OH
V_OL
V_CCPD
I_CCO
High-level output voltage (@ I_OH = –8.0 mA, V_CC min)
Low-level output voltage (@ I_OL = 8.0 mA, V_CC min)
Commercial
High-level output voltage (@ I_OH = –8.0 mA, V_CC min)
Low-level output voltage (@ I_OL = 8.0 mA, V_CC min)
Industrial
Power-down supply voltage (PWRDWN must be Low)
Quiescent LCA supply current
Chip thresholds programmed as CMOS levels¹
3.86
3.76
2.30
V
0.40 V
V
0.40 V
V
8 mA
Chip thresholds programmed as TTL levels
14 mA
I_IL
Input Leakage Current
C_IN
Input capacitance, all packages except PGA175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
–10
+10 µA
10 pF
15 pF
Input capacitance, PGA 175
(sample tested)
All Pins except XTL1 and XTL2
XTL1 and XTL2
15 pF
20 pF
I_RIN
Pad pull-up (when selected) @ V_IN = 0V (sample tested)
0.02 0.17 mA
I_RLL
Horizontal long line pull-up (when selected) @ logic Low
0.20 2.80 mA
Note:
1. With no output current loads, no active input or long line pull-up resistors, all package pins at V_CC or GND,
and the LCA configured with a MakeBits tie option.
2. Total continuous output sink current may not exceed 100 mA per ground pin. The number of ground pins varies
from two for the XC3120A in the PC84 package, to eight for the XC3195A in the PQ208 or PG223 package.
2-179