DS782 Datasheet, PDF (3/7 Pages) Xilinx, Inc – Has a user-selectable number of Spartan-6 GTP transceivers

ChipScope IBERT for Spartan-6 GTP
General IBERT Options
The first screen in the CORE Generator tool is used to set up general IBERT options, described in the following
sections.
Choosing the Component Name
The Component Name can be any combination of alpha-numeric characters, including the underscore symbol.
However, the underscore symbol cannot be the first character in the component name.
Selecting the Number of Line Rates (Protocols)
The IBERT core can have multiple MGTs, which do not have to operate at the same line rate, or use the same
reference clock. Choose the number of distinct line rate/reference clock rate combinations needed from the Number
of Line Rates (protocols) dialog.
Choosing the Line Rate Settings
For each line rate setting desired, choose between a custom setting (“Start from scratch”) or a pre-defined protocol
setting from the Protocol combo box. If a named protocol is chosen, the fields for Max Rate, Data Width, and
REFCLK are automatically filled in according to the protocol. If specifying a custom protocol, type in the values
desired.
Selecting the GTPA1_DUALs and Reference Clocks
After selecting the protocol options for the IBERT core, click Next to view the GTPA1_DUALs. Select GTXs and
Reference Clocks for Line Rate 1. After Line Rate 1 is complete, click Next to access Line Rate 2, etc. until all the line
rates are completed.
Choosing GTPA1_DUALs
Each available GTPA1_DUAL (also referred to as “DUAL” is listed with its location and a checkbox next to it. You
cannot select a single transceiver within the DUAL: both transceivers must be used. If the checkbox is greyed out,
the transceiver is already configured with a different line rate. Check the DUALs that will use the given line rate.
Although both DUALs must be configured at the same line rate at generate time, that can be altered at runtime.
Choosing REFCLK Sources
From the GTP1 REFCLK Source combo box, choose the reference clock for each transceiver. One reference clock is
available from the DUAL, and reference clocks are also available from neighboring DUALs. See the Spartan-6 FPGA
GTP Transceivers User Guide for more information on the clocking topology.
Enabling RXRECCLK Probes
After selecting the GTP transceivers and REFCLK options for the IBERT core for all the line rates, click Next to view
the RXRECCLK Probe options.
For each of the GTP transceivers used, it is possible to drive the RXRECCLK (recovered clock) out to a pin for use
in external measurement. To enable this, check the Enable checkbox next to the desired recovered clock. Then
specify the pin location in the Location text field, and choose the I/O Standard from the IO Standard combo box. For
differential standards, specify the P pin location.
Choosing the System Clock Source
After selecting the RXRECCLK probing options, click Next to view the System Clock options.
DS782 October 19, 2011
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