XA2C256 Datasheet, PDF (17/19 Pages) Xilinx, Inc – AEC-Q100 device qualification and full PPAP support

R
XA2C256 CoolRunner-II Automotive CPLD
VCC
I/O⁽¹⁾
I/O⁽¹⁾
1
2
3
I/O
I/O⁽¹⁾
I/O⁽¹⁾
4
5
6
I/O
7
V_AUX
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
17
NC
18
I/O
19
NC
20
I/O
21
I/O
22
I/O
23
I/O
24
I/O
25
I/O
26
VCCIO1
27
I/O
28
GND
29
I/O⁽²⁾
30
NC
31
I/O⁽²⁾
32
NC
33
NC
34
I/O⁽⁴⁾
35
GND
36
TQG144
Top View
108
GND
107
NC
106
NC
105
I/O
104
I/O
103
I/O
102
I/O
101
I/O
100
I/O
99
GND
98
I/O
97
I/O
96
I/O
95
I/O
94
I/O
93
V_CCIO1
92
I/O
91
I/O
90
GND
89
GND
88
I/O
87
I/O
86
I/O
85
I/O
84
V_CC
83
I/O
82
I/O
81
I/O
80
I/O
79
I/O
78
I/O
77
I/O
76
I/O
75
NC
74
I/O
73
V_CCIO1
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(4) - Clock Divide Reset
(5) - DataGATE Enable
Figure 7: TQ144 Thin Quad Flat Pack
CoolRunner-II Automotive Requirements and Recommendations
Requirements
The following requirements are for all automotive applica-
tions:
1. Use a monotonic, fast ramp power supply to power up
CoolRunner-II . A V_CC ramp time of less than 1 ms is
required.
2. Do not float I/O pins during device operation. Floating
I/O pins can increase I_CC as input buffers will draw
1-2 mA per floating input. In addition, when I/O pins are
floated, noise can propagate to the center of the CPLD.
I/O pins should be appropriately terminated with
bus-hold or pull-up. Unused I/Os can also be configured
as C_GND (programmable GND).
3. Do not drive I/O pins without V_CC/V_CCIO powered.
4. Sink current when driving LEDs. Because all Xilinx
CPLDs have N-channel pull-down transistors on
outputs, it is required that an LED anode is sourced
through a resistor externally to V_CC. Consequently, this
will give the brightest solution.
DS555 (v1.1) May 5, 2007
www.xilinx.com
17
Product Specification