UG445 Datasheet, PDF (12/24 Pages) –

Thresholds
R
4.7 kΩ is recommended. If the incorrect value of a pull-down is used, a voltage divider is
created at the input.
More information on the half latch is available in the XPLA3 I/O Cell Characteristics
Application Note (XAPP342).
CoolRunner-II
The CoolRunner-II I/Os have a half latch feature enabled by default. Half latch occurs only
in cases when the CoolRunner-II I/Os are configured as LVCMOS18 and the Schmitt
trigger is disabled. If the Schmitt trigger is used, the half latch is disabled. When using
LVCMOS18, the only way to turn the half latch off is to enable the Schmitt trigger on that
input.
XC9500, XC9500XL, and XC9500XV
The XC9500 families do not have a half latch.
The XC9500XL and XC9500XV have internal circuitries that function in a similar manner to
a half latch. To overcome this circuitry, ensure that a pull-down of 4.7 kΩ or stronger is
used. (The effective resistance of the internal circuitry is between 30 to 60 kΩ.)
JTAG Termination
XC9500, XC9500XL, XC9500XV, and CoolRunner XPLA3 have internal pull-ups on TDI
and TMS.
CoolRunner-II devices have internal pull-ups on TDI, TMS, and TCK.
It is recommended to place external pull-up resistors on the JTAG input pins TDI, TMS,
and TCK. For a single device, the resistor value of 4.7 kΩ is suggested. This value may be
adjusted depending on the number of devices in the JTAG chain or the application.
External pull-down termination is not recommended as it would conflict with the internal
pull-ups.
Thresholds
I/V Curves
The I/V curve is a graphical representation of the nominal amount of current that an I/O
can source or sink at different voltage levels. The range of voltage levels, and therefore, the
current, is dependent on the I/O voltage used. The I/V curves provide details on
thresholds.
The I/V curves for the CoolRunner-II and CoolRunner XPLA3 devices can be found in the
family data sheets and in the I/V Curves for Xilinx FPGA and CPLD Families Application Note
(XAPP150) for the XC9500, XC9500XL and XC9500XV families.
Questions often asked by users are:
• How much current can an I/O source or sink?
• If I am driving a certain load, what voltage levels can I expect?
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CPLD I/O User Guide
UG445 (v1.2) January 14, 2014