DS897 Datasheet, PDF (10/10 Pages) Xilinx, Inc – Zynq-7000 All Programmable SoC Bus Functional Model v2.0

Zynq-7000 All Programmable SoC Bus Functional Model v2.0
AR 57508
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Licensing and Ordering Information
The Zynq-7000 Bus Functional Model is provided under the terms of the Xilinx Core License Agreement. A full
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Revision History
The following table shows the revision history for this document:
Date
04/06/2016
10/01/2014
06/04/2014
10/02/2013
05/24/2013
03/20/2013
Version
2.0
2.0
2.0
2.0
1.1
1.0
Description of Revisions
Updated for ease of use.
Updated for Static Remap feature.
Updated API outputs and added 3 new APIs.
Synch doc version with core version. Updated API outputs. Added Master AR.
Updated for Simulator support and Example Design section with link to AR.
Initial Xilinx release.
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DS897 April 6, 2016
Product Specification
www.xilinx.com
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