X9258 Datasheet, PDF (5/22 Pages) Xicor Inc. – Quad Digital Controlled Potentiometers (XDCP)

X9258
Figure 2. Instruction Byte Format
Register
Select
I3 I2 I1 I0 R1 R0 P1 P0
Instructions
Wiper Counter
Register Select
The four high order bits define the instruction. The next
two bits (R1 and R0) select one of the four registers that
is to be acted upon when a register oriented instruction
is issued. The last bits (P1, P0) select which one of the
four potentiometers is to be affected by the instruction.
Four of the nine instructions end with the transmission
of the instruction byte. The basic sequence is illustrated
in Figure 3. These two-byte instructions exchange data
between the Wiper Counter Register and one of the
data registers. A transfer from a Data Register to a
Wiper Counter Register is essentially a write to a static
RAM. The response of the wiper to this action will be
delayed t_WRL. A transfer from the Wiper Counter
Register (current wiper position), to a data register is a
write to nonvolatile memory and takes a minimum of
t_WR to complete. The transfer can occur between one of
the four potentiometers and one of its associated
registers; or it may occur globally, wherein the transfer
occurs between all of the potentiometers and one of
their associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9258; either between the host and one of
the data registers or directly between the host and the
Wiper Counter Register. These instructions are: Read
Wiper Counter Register (read the current wiper position
of the selected pot), Write Wiper Counter Register
(change current wiper position of the selected pot),
Read Data Register (read the contents of the selected
nonvolatile register) and Write Data Register (write a
new value to the selected data register). The sequence
of operations is shown in Figure 4.
Figure 3. Two-Byte Instruction Sequence
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 P1 P0 A S
T
C
CT
A
K
KO
R
P
T
The Increment/Decrement command is different from
the other commands. Once the command is issued and
the X9258 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in
one segment steps; thereby, providing a fine tuning
capability to the host. For each SCL clock pulse (t_HIGH)
while SDA is HIGH, the selected wiper will move one
resistor segment towards the V_H terminal. Similarly, for
each SCL clock pulse while SDA is LOW, the selected
wiper will move one resistor segment towards the V_L/R_L
terminal. A detailed illustration of the sequence and
timing for this operation are shown in Figures 5 and 6
respectively.
REV 1.1.7 2/4/03
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Characteristics subject to change without notice. 5 of 22