X9258 Datasheet, PDF (4/22 Pages) Xicor Inc. – Quad Digital Controlled Potentiometers (XDCP)

X9258
Figure 1. Slave Address
Device Type
Identifier
0 1 0 1 A3 A2 A1 A0
Device Address
The next four bits of the slave address are the device
address. The physical device address is defined by the
state of the A0-A3 inputs. The X9258 compares the
serial data stream with the address input state; a
successful compare of all four address bits is required
for the X9258 to respond with an acknowledge. The
A₀–A₃ inputs can be actively driven by CMOS input
signals or tied to V_CC or V_SS.
Acknowledge Polling
The disabling of the inputs, during the internal
nonvolatile write operation, can be used to take
advantage of the typical 5ms nonvolatile write cycle
time. Once the stop condition is issued to indicate the
end of the nonvolatile write command the X9258
initiates the internal write cycle. ACK polling can be
initiated immediately. This involves issuing the start
condition followed by the device slave address. If the
X9258 is still busy with the write operation no ACK will
be returned. If the X9258 has completed the write
operation an ACK will be returned and the master can
then proceed with the next operation.
ACK Polling Sequence
Nonvolatile Write
Command Completed
EnterACK Polling
Issue
START
Issue Slave
Address
ACK
No
Returned?
Yes
Further
No
Operation?
Yes
Issue
Instruction
Issue STOP
Issue STOP
Proceed
Proceed
Instruction Structure
The next byte sent to the X9258 contains the
instruction and register pointer information. The four
most significant bits are the instruction. The next four
bits point to one of the two pots and when applicable
they point to one of four associated registers. The
format is shown below in Figure 2.
REV 1.1.7 2/4/03
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