X9258 Datasheet, PDF (2/22 Pages) Xicor Inc. – Quad Digital Controlled Potentiometers (XDCP)

X9258
PIN DESCRIPTIONS
Host Interface Pins
SERIAL CLOCK (SCL)
The SCL input is used to clock data into and out of the
X9258.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
DEVICE ADDRESS (A₀–A₃)
The Address inputs are used to set the least
significant 4 bits of the 8-bit slave address. A match in
the slave address serial data stream must be made
with the address input in order to initiate
communication with the X9258. A maximum of 16
devices may occupy the 2-wire serial bus.
Potentiometer Pins
V_H/R_H (V_H0/R_H0–V_H3/R_H3), V_L/R_L (V_L0/R_L0–V_L3/R_L3)
The V_H/R_H and V_L/R_L inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
V_W/R_W (V_W0/R_W0–V_W3/R_W3)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages
for the DCP analog section.
PIN CONFIGURATION
NC
A0
V_W3/R_W3
V_H3/R_H3
V_L3/R_L3
V+
V_CC
V_L0/R_L0
V_H0/R_H0
V_W0/R_W0
A2
WP
SOIC/TSSOP
1
24
2
23
3
22
4
21
5
20
6
19
X9258
7
18
8
17
9
16
10
15
11
14
12
13
A3
SCL
V_L2/R_L2
V_H2/R_H2
V_W2/R_W2
V–
V_SS
V_W1/R_W1
V_H1/R_H1
V_L1/R_L1
A1
SDA
CSP
1
2
3
4
A
R_W0
R_L0
B
V_CC
C
V+
D
R_L3
E
R_W3
F
A₂
A₁
R_L1
WP
SDA
R_W1
R_H0
R_H1
V_SS
R_H3
R_H2
V-
NC
A₃
R_W2
A₀
SCL
R_L2
Top View–Bumps Down
REV 1.1.7 2/4/03
www.xicor.com
Characteristics subject to change without notice. 2 of 22