X5083 Datasheet, PDF (3/21 Pages) Xicor Inc. – CPU Supervisor with 8Kbit SPI EEPROM

X5083
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X5083 activates a power on
reset circuit. This circuit goes LOW at 1V and pulls the
RESET pin active. This signal prevents the system
microprocessor from starting to operate with insuffi-
cient voltage or prior to stabilization of the oscillator.
RESET active also blocks communication to the device
through the SPI interface. When V_CC exceeds the
device V_TRIP value for 200ms (nominal) the circuit
releases RESET, allowing the processor to begin exe-
cuting code. While V_CC < V_TRIP communications to the
device are inhibited.
Low Voltage Monitoring
During operation, the X5083 monitors the V_CC level
and asserts RESET if supply voltage falls below a pre-
set minimum V_TRIP. The RESET signal prevents the
microprocessor from operating in a power fail or
brownout condition and terminates any SPI communi-
cation in progress. The RESET signal remains active
until the voltage drops below 1V. It also remains active
until V_CC returns and exceeds V_TRIP for 200ms.
When V_CC falls below V_TRIP, any communications in
progress are terminated and communications are
inhibited until V_CC exceeds V_TRIP for t_PURST.
Watchdog Timer
The watchdog timer circuit monitors the microprocessor
activity by monitoring the WDI input. The microprocessor
must toggle the CS/WDI pin periodically to prevent a
RESET signal. The CS/WDI pin must be toggled from
HIGH to LOW prior to the expiration of the watchdog time
out period. The state of two nonvolatile control bits in the
status register determine the watchdog timer period. The
microprocessor can change these watchdog bits with no
action taken by the microprocessor these bits remain
unchanged, even after total power failure.
V_CC Threshold Reset Procedure
The X5083 is shipped with a standard V_CC threshold
(V_TRIP) voltage. This value will not change over normal
operating and storage conditions. However, in applica-
tions where the standard V_TRIP is not exactly right, or if
higher precision is needed in the V_TRIP value, the
X5083 threshold may be adjusted. The procedure is
described below, and uses the application of a high
voltage control signal.
Setting the V_TRIP Voltage
This procedure is used to set the V_TRIP to a higher
voltage value. For example, if the current V_TRIP is 4.4V
and the new V_TRIP is 4.6V, this procedure will directly
make the change. If the new setting is to be lower than
the current setting, then it is necessary to reset the trip
point before setting the new value.
To set the new V_TRIP voltage, apply the desired V_TRIP
threshold voltage to the V_CC pin and tie the WP pin to
the programming voltage V_P. Then send a WREN com-
mand, followed by a write of Data 00h to address 01h.
CS going HIGH on the write operation initiates the
V_TRIP programming sequence. Bring WP LOW to com-
plete the operation.
Note: This operation also writes 00h to array address
01h.
Figure 1. Set V_TRIP Level Sequence (V_CC = desired V_TRIP value)
WP
V_P = 15-18V
CS
SCK
0 1 23 4 56 7
SI
06h
WREN
0 1 2 3 4 5 6 7 8 9 10 20 21 22 23
02h
Write
16 Bits
0001h
Address
00h
Data
REV 1.1.6 6/25/02
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Characteristics subject to change without notice. 3 of 21