X5083 Datasheet, PDF (14/21 Pages) Xicor Inc. – CPU Supervisor with 8Kbit SPI EEPROM

X5083
Data Output Timing
Symbol
f_SCK
t_DIS
t_V
t_HO
t_RO⁽³⁾
t_FO⁽³⁾
Parameter
Clock frequency
Output disable time
Output valid from clock low
Output hold time
Output rise time
Output fall time
2.7V–5.5V
Min.
Max.
0
3.3
150
130
0
50
50
Unit
MHz
ns
ns
ns
ns
ns
Notes: (3) This parameter is periodically sampled and not 100% tested.
(4) t_WC is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile
write cycle.
Serial Output Timing
CS
SCK
SO
t_CYC
t_WH
t_V
t_HO
t_WL
MSB Out
MSB–1 Out
t_LAG
t_DIS
LSB Out
SI
ADDR
LSB IN
Serial Input Timing
CS
SCK
SI
t_LEAD
t_SU
t_H
MSB IN
High Impedance
SO
t_CS
t_LAG
t_RI
t_FI
LSB IN
REV 1.1.6 6/25/02
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Characteristics subject to change without notice. 14 of 21