X88C75 Datasheet, PDF (19/27 Pages) Xicor Inc. – Port Expander and E2 Memory

X88C75 SLIC^® E²
WR Controlled Write Cycle
Symbol
Parameter
tLHLL
tAVLL
t_LLAX
tDVWH
tWHDX
t_ELLL
tWLWH
tWRS
t_WRH
tBLC
tWC ⁽⁷⁾
ALE Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Chip Enable Setup Time
WR Pulse Width
WR Setup Time
WR Hold Time
Byte Load Time (Page Write)
Write Cycle Time
WR Controlled Write Timing Diagram
Min.
80
20
30
50
30
7
120
30
20
0.5
Max.
100
5
CE
ALE
A/D0–A/D7
A8–A12
WR
tLHLL
tELLL
tAVLL
AIN
tLLAX
tWRS
tWRH
tWRH
tWLWH
DIN
tDVWH
tWHDX
ADDRESS
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
2887 PGM T12
2887 ILL F25
Note: (7) t_WC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
19