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WM8958 Datasheet, PDF (228/377 Pages) Wolfson Microelectronics plc – Multi-Channel Audio Hub CODEC for Smartphones
WM8958
Pre-Production
REGISTER
BIT
ADDRESS
LABEL
DEFAULT
DESCRIPTION
R272 (0110h) 15 WSEQ_ENA
Write
Sequencer
Ctrl (1)
9
WSEQ_ABORT
0
Write Sequencer Enable.
0 = Disabled
1 = Enabled
0
Writing a 1 to this bit aborts the
current sequence and returns control
of the device back to the serial
control interface.
8
WSEQ_START
0
Writing a 1 to this bit starts the write
sequencer at the index location
selected by WSEQ_START_INDEX.
The sequence continues until it
reaches an “End of sequence” flag.
At the end of the sequence, this bit
will be reset by the Write Sequencer.
6:0 WSEQ_START_ 000_0000 Sequence Start Index. This field
INDEX [6:0]
determines the memory location of
the first command in the selected
sequence. There are 127 Write
Sequencer RAM addresses:
00h = WSEQ_ADDR0 (R12288)
01h = WSEQ_ADDR1 (R12292)
02h = WSEQ_ADDR2 (R12296)
….
7Fh = WSEQ_ADDR127 (R12796)
R273 (0111h)
8
WSEQ_BUSY
0
Sequencer Busy flag (Read Only).
Write
Sequencer
Ctrl (2)
(read only)
0 = Sequencer idle
1 = Sequencer busy
Note: it is not possible to write to
control registers via the control
interface while the Sequencer is
Busy.
6:0 WSEQ_CURRE 000_0000 Sequence Current Index. This
NT_INDEX [6:0]
indicates the memory location of the
(read only)
most recently accessed command in
the write sequencer memory.
Coding is the same as
WSEQ_START_INDEX.
Table 130 Write Sequencer Control - Initiating a Sequence
PROGRAMMING A SEQUENCE
A sequence consists of write operations to data bits (or groups of bits) within the control registers.
Each write operation is defined by a block of 4 registers, which contain 6 fields as described in this
section.
The block of 4 registers is the same for up to 128 steps held in the sequencer memory. Multiple
sequences can be held in the memory at the same time; each sequence occupies its own range
within the 128 available register blocks.
The following 6 fields are replicated 128 times - one for each of the sequencer’s 128 steps. In the
following descriptions, the term ‘n’ is used to denote the step number, from 0 to 127.
WSEQ_ADDRn is a 14-bit field containing the Control Register Address in which the data should be
written.
WSEQ_DATAn is an 8-bit field which contains the data to be written to the selected Control Register.
The WSEQ_DATA_WIDTHn field determines how many of these bits are written to the selected
register; the most significant bits (above the number indicated by WSEQ_DATA_WIDTHn) are
ignored.
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PP, August 2012, Rev 3.4
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