WM5102 Datasheet, PDF (223/334 Pages) Wolfson Microelectronics plc – Audio Hub CODEC with Voice Processor DSP

Production Data
WM5102
REGISTER
ADDRESS
R3392
(0D40h)
Interrupt
Pin Status
BIT
LABEL
2 DAC_UNDERCL
OCKED_STS
1 ADC_UNDERCL
OCKED_STS
0 MIXER_UNDERC
LOCKED_STS
1 IRQ2_STS
0 IRQ1_STS
R3413
(0D55h)
3 MICD_CLAMP_S
TS
AOD IRQ
Raw Status
2 GP5_STS
0 JD1_STS
Table 96 Interrupt Status
DEFAULT
DESCRIPTION
0
0
0
0
IRQ2 Status
IRQ2_STS is the logical ‘OR’ of all
unmasked _EINT2 interrupts.
0 = Not asserted
1 = Asserted
0
IRQ1 Status
IRQ1_STS is the logical ‘OR’ of all
unmasked _EINT1 interrupts.
0 = Not asserted
1 = Asserted
0
MICDET Clamp status
0 = Clamp not active
1 = Clamp active
Note that the MICDET Clamp is provided
on the MICDET1 or MICDET2 pins,
depending on the ACCDET_SRC
register bit.
0
GP5 Status
0 = Not asserted
1 = Asserted
0
JACKDET input status
0 = Jack not detected
1 = Jack is detected
(Assumes the JACKDET pin is pulled
‘low’ on Jack insertion.)
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PD, June 2014, Rev 4.2
223