W83176R-732_06 Datasheet, PDF (7/12 Pages) Winbond – 2 DIMM DDR ZERO DELAY buffer for Sis chipset

W83176R-732/W83176G-732
2 DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET
7. ACCESS INTERFACE
The W83176R-732 provides I²C Serial Bus for microprocessor to read/write internal registers. In the
W83176R-732 is provided Block Read/Block Write and Byte-Data Read/Write protocol. The I²C write
address is defined at 0xD4. The I²C read address is defined at 0xD5.
7.1 Block Write protocol
7.2 Block Read protocol
## In block mode, the command code must filled ‘00h’
7.3 Byte Write protocol
7.4 Byte Read protocol
-4-