W83176R-732_06 Datasheet, PDF (6/12 Pages) Winbond – 2 DIMM DDR ZERO DELAY buffer for Sis chipset

W83176R-732/W83176G-732
2 DIMM DDR ZERO DELAY buffer for Sis chipset
5.2 Power Pins
PIN
6,11,15,28
3,12,23
10
PIN NAME
GND
VDD
AVDD
DESCRIPTION
Ground
Power Supply 2.5V
Analog power supply, 2.5V
6. REGISTER 0 ~ REGISTER 4 RESERVED
6.1 Register 5: Output Control (1 = Active, 0 = Inactive) (Default =FFh)
BIT @POWERUP
PIN
DESCRIPTION
7
1
1,2 CLKC0, CLKT0 (Active / Inactive)
6
1
5,4 CLKC1, CLKT1 (Active / Inactive)
5
1
-
Reserved
4
1
-
Reserved
3
1
14,13 CLKC2, CLKT2 (Active / Inactive)
2
1
16,17 CLKC3, CLKT3 (Active / Inactive)
1
1
-
Reserved
0
1
-
Reserved
6.2 Register 6: Output Control (1 = active, 0 = inactive) (Default =FFh)
BIT @POWERUP
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
PIN
-
-
-
-
25,24
-
27,26
-
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
CLKC4, CLKT4 (Active / Inactive)
Reserved
CLKC5, CLKT5 (Active / Inactive)
Reserved
-3-
Publication Release Date: March, 2006
Revision 1.1