W25Q128BV_13 Datasheet, PDF (65/74 Pages) Winbond – 3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

W25Q128BV
8.7 AC Electrical Characteristics (cont’d)
DESCRIPTION
SPEC
SYMBOL ALT
MIN TYP
MAX
UNIT
/HOLD Active Setup Time relative to CLK
tHLCH
5
ns
/HOLD Active Hold Time relative to CLK
tCHHH
5
ns
/HOLD Not Active Setup Time relative to CLK
tHHCH
5
ns
/HOLD Not Active Hold Time relative to CLK
tCHHL
5
/HOLD to Output Low-Z
tHHQX⁽²⁾
tLZ
/HOLD to Output High-Z
tHLQZ⁽²⁾
tHZ
Write Protect Setup Time Before /CS Low
tWHSL⁽³⁾
20
Write Protect Hold Time After /CS High
tSHWL⁽³⁾
100
/CS High to Power-down Mode
tDP⁽²⁾
/CS High to Standby Mode without Electronic
Signature Read
tRES1⁽²⁾
/CS High to Standby Mode with Electronic Signature
Read
tRES2⁽²⁾
/CS High to next Instruction after Suspend
tSUS⁽²⁾
ns
7
ns
12
ns
ns
ns
3
µs
3
µs
1.8
µs
20
µs
Write Status Register Time
tW
Byte Program Time (First Byte) ⁽⁴⁾
t_BP1
Additional Byte Program Time (After First Byte) ⁽⁴⁾
t_BP2
10
15
ms
30
50
µs
2.5
12
µs
Page Program Time
Sector Erase Time (4KB)
tPP
0.7
3
ms
tSE
30 200/400⁽⁵⁾ ms
Block Erase Time (32KB)
Block Erase Time (64KB)
tBE₁
120
800
ms
tBE₂
150
1,000
ms
Chip Erase Time
tCE
25
40
s
Notes:
1. Clock high + Clock low must be less than or equal to 1/fC.
2. Value guaranteed by design and/or characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write Status Register instruction when SRP[1:0]=(0,1).
4. For multiple bytes after first byte within a page, t_BPN = t_{BP1 +} t_{BP2 * N} (typical) and t_BPN = t_{BP1 +} t_{BP2 * N} (max), where N = number of bytes
programmed.
5. Max Value t_SE with <50K cycles is 200ms and >50K & <100K cycles is 400ms.
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Publication Release Date: October 03, 2013
Revision H