W9825G2JB Datasheet, PDF (6/41 Pages) Winbond – 2M  4 BANKS  32BITS SDRAM

6. BLOCK DIAGRAM
W9825G2JB
CLK
CKE
CLOCK
BUFFER
CS
RAS
CAS
WE
COMMAND
DECODER
CONTROL
SIGNAL
GENERATOR
A10
A0
A9
A11
BS0
BS1
ADDRESS
BUFFER
MODE
REGISTER
REFRESH
COUNTER
COLUMN
COUNTER
COLUMN DECODER
CELL ARRAY
BANK #0
SENSE AMPLIFIER
DATA CONTROL
CIRCUIT
COLUMN DECODER
CELL ARRAY
BANK #1
SENSE AMPLIFIER
DQ
BUFFER
DQ0 - 31
DQM0 - 3
COLUMN DECODER
CELL ARRAY
BANK #2
SENSE AMPLIFIER
COLUMN DECODER
CELL ARRAY
BANK #3
SENSE AMPLIFIER
Note: The cell array configuration is 4049 * 512 * 32
Publication Release Date: Apr. 11, 2011
-6-
Revision A01