W9825G2JB Datasheet, PDF (12/41 Pages) Winbond – 2M  4 BANKS  32BITS SDRAM

W9825G2JB
8. OPERATION MODE
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 1 shows the truth table for the operation commands.
Table 1 Truth Table (Note (1), (2))
COMMAND
DEVICE
STATE
CKEn-1 CKEn DQM BS0, 1 A10
Bank Active
Bank Precharge
Precharge All
Write
Write with Auto-precharge
Read
Read with Auto-precharge
Mode Register Set
No – Operation
Burst Stop
Device Deselect
Auto - Refresh
Self - Refresh Entry
Self Refresh Exit
Clock suspend Mode Entry
Power Down Mode Entry
Idle
Any
Any
Active ⁽³⁾
Active ⁽³⁾
Active ⁽³⁾
Active ⁽³⁾
Idle
Any
Active ⁽⁴⁾
Any
Idle
Idle
idle
(S.R.)
Active
Idle
Active ⁽⁵⁾
H
x
x
v
v
H
x
x
v
L
H
x
x
x
H
H
x
x
v
L
H
x
x
v
H
H
x
x
v
L
H
x
x
v
H
H
x
x
v
v
H
x
x
x
x
H
x
x
x
x
H
x
x
x
x
H
H
x
x
x
H
L
x
x
x
L
H
x
x
x
L
H
x
x
x
H
L
x
x
x
H
L
x
x
x
H
L
x
x
x
Clock Suspend Mode Exit
Active
L
H
x
x
x
A0A9
A11
v
x
x
v
v
v
v
v
x
x
x
x
x
x
x
x
x
x
x
CS RAS CAS WE
LL
H
H
LL
H
L
LL
H
L
LH
L
L
LH
L
L
LH
L
H
LH
L
H
LL
L
L
LH
H
H
LH
H
L
Hx
x
x
LL
L
H
LL
L
H
Hx
x
x
LH
H
x
xx
x
Xx
Hx
x
x
LH
H
x
X
xx
x
x
Power Down Mode Exit
Any
L
(power down) L
H
x
x
x
H
x
x
x
x
Hx
x
x
x
LH
H
x
Data write/Output Enable
Active
H
x
L
x
x
x
Data Write/Output Disable
Active
H
x
H
x
x
x
Notes:
(1) v = valid x = Don’t care L = Low Level H = High Level
(2) CKEn signal is input level when commands are provided.
CKEn-1 signal is the input level one clock cycle before the command is issued.
(3) These are state of bank designated by BS0, BS1 signals.
(4) Device state is full page burst operation.
(5) Power-down Mode can not be entered in the burst cycle.
When this command asserts in the burst cycle, device state is clock suspend mode.
xx
x
x
xx
x
x
- 12 -
Publication Release Date: Apr. 11, 2011
Revision A01