W83195WG-382 Datasheet, PDF (6/27 Pages) Winbond – Winbond Clock Generator

W83195WG-382/W83195CG-382
STEPLESS FOR ATI K8 CLOCK GENERATOR
3. PIN CONFIGURATION
XIN 1
XOUT 2
VDD48 3
*TURBO_SEL/USB_48 4
GND 5
*PD# 6
SCLK 7
SDATA 8
RESET# 9
&_{CLKREQA# 10}
&_TURBO/&_{CLKREQB# 11}
SRCT7 12
SRCC7 13
VDDSRC 14
GND 15
SRCT6 16
SRCC6 17
SRCT5 18
SRCC5 19
GND 20
VDDSRC 21
SRCT4 22
SRCC4 23
SRCT3 24
SRCC3 25
GND 26
ATIGT1 27
ATIGC1 28
#: Active low
*: Internal pull up resistor 120K to VDD
&: Internal Pull-down resistor 120K to GND
56 VDDREF
55 GND
54 ^&FSA/REF0
53 ^&FSB/REF1
52 ^&FSC/REF2
51 VDDPCI
50 PCICLK0
49 GND
48 VDDHTT
47 HTTCLK0
46 GND
45 CPUCLK8T0
44 CPUCLK8C0
43 VDDCPU
42 GND
41 CPUCLK8T1
40 CPUCLK8C1
39 VDDA
38 GNDA
37 IREF
36 GND
35 VDDSRC
34 SRCT0
33 SRCC0
32 VDDATI
31 GND
30 ATIGT0
29 ATIGC0
4. BLOCK DIAGRAM
X IN
XOUT
FS(A :C)
C R #_(A :B )
*TU R B O_SEL
&_{TU R B O}
*P D #
SDATA
SCLK
A T IG L O O P
USBLOOP
CPULOOP
S p re a d
S pectrum
XTAL
OSC
SRCLOOP
S p re a d
S p e c tru m
VCOCLK
M /N /R atio
ROM
D ivid er
D ivid er
& Sync
D ivider
& Snyc
Latch
&POR
C ontrol
L og ic
& C o n fig
R egister
I2 C
In te rfa c e
2
A T IG T 0:1
A T IG C 0:1
2
48M H z
3
R EF 0:2
3
C P U C LK 8T 0:1
C P U C LK8C 0:1
3
6
S R C T 0,3:7
S R C C 0,3:7
6
HTTCLK0
P C I0
RESET#
475
Publication Release Date: Feb 2006
-2-
Revision 0.6