W83195WG-382 Datasheet, PDF (11/27 Pages) Winbond – Winbond Clock Generator

W83195WG-382/W83195CG-382
STEPLESS FOR ATI K8 CLOCK GENERATOR
7.3 Register 2: ( Default : 03h )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
7 CLREQA7#_Ctr
SRCCLK7 is controlled by the CLREQA# pin
0 1: Controllable
0: Uncontrollable
6 CLREQA6#_Ctr
SRCCLK6 is controlled by the CLREQA# pin
0 1: Controllable
0: Uncontrollable
5 CLREQA5#_Ctr
4 CLREQA4#_Ctr
SRCCLK5 is controlled by the CLREQA# pin
0 1: Controllable
0: Uncontrollable
SRCCLK4 is controlled by the CLREQA# pin
0 1: Controllable
0: Uncontrollable
3 CLREQA3#_Ctr
SRCCLK3 is controlled by the CLREQA# pin
0 1: Controllable
0: Uncontrollable
2 CLREQA0#_Ctr
SRCCLK0 is controlled by the CLREQA# pin
0 1: Controllable
0: Uncontrollable
1 Reserved
1 Reserved
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0 Reserved
1 Reserved
R/W
7.4 Register 3: ( Default : 03h )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
7 CLREQB7#_Ctr
6 CLREQB6#_Ctr
5 CLREQB5#_Ctr
4 CLREQB4#_Ctr
3 CLREQB3#_Ctr
SRCCLK7 is controlled by the CLREQB# pin
0 _{1: Controllable}
0: Uncontrollable
SRCCLK6 is controlled by the CLREQB# pin
0 _{1: Controllable}
0: Uncontrollable
SRCCLK5 is controlled by the CLREQB# pin
0 _{1: Controllable}
0: Uncontrollable
SRCCLK4 is controlled by the CLREQB# pin
0 _{1: Controllable}
0: Uncontrollable
SRCCLK3 is controlled by the CLREQB# pin
0 _{1: Controllable}
0: Uncontrollable
TYPE
R/W
R/W
R/W
R/W
R/W
Publication Release Date: Feb 2006
-7-
Revision 0.6