W83195WG-382 Datasheet, PDF (19/27 Pages) Winbond – Winbond Clock Generator

W83195WG-382/W83195CG-382
4 SRC_FS<1>
3 SRC_FS<0>
2 CENTERSKEW<2>
1 CENTERSKEW<1>
0 CENTERSKEW<0>
STEPLESS FOR ATI K8 CLOCK GENERATOR
0
0
1 ^{CPU1 center skew control}
0 ^{Skew resolution is 300ps}
R/W
The decision of skew direction is same as
0 CENTERSKEW<2:0> setting
7.21 Register 20: ( Default : 88h )
BIT
AFFECTED
PIN/FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
7 Reserved
1 Reserved
6 SEC<6>
0
5 SEC<5>
4 SEC<4>
3 SEC<3>
2 SEC<2>
1 SEC<1>
0
0
Setting the down count depth (Failure decision).
One bit resolution represent 250ms. Default time
1 depth is 8*250ms = 2.0 second. If the watchdog
0
timer is counting, this register will return present
down count value.
0
0 SEC<0>
0
TYPE
R/W
R/W
7.22 Register 21: ( Default : ECh )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
7 Reserved
1 Reserved
6 CPU2SRC_SYNC
5 CPU2PCI_SYNC
CPU align with SRC
1 1 : Enable
0 : Disable
CPU align with PCI
1 1 : Enable
0 : Disable
4 Reserved
0 Reserved
3 Reserved
2 SRCSKEW<2>
1 SRCSKEW<1>
0 SRCSKEW<0>
1 Reserved
1 ^{CPU1 to SRC skew control}
0 ^{Skew resolution is 300ps}
The decision of skew direction is same as
0 _{SRCSKEW<2:0> setting}
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
- 15 -
Publication Release Date: Feb 2006
Revision 0.6