W9464G6IH Datasheet, PDF(50/54 Page) Winbond – 1M × 4 BANKS × 16 BITS DDR SDRAM

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W9464G6IH Datasheet, PDF (50/54 Pages) Winbond – 1M × 4 BANKS × 16 BITS DDR SDRAM

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W9464G6IH

11.21 4 Bank Interleave Read Operation (CL = 2, BL = 2)

CLK

CMD

DQS

ACTa

tRRD

tRC(a)

tRRD

ACTb

tRCD(a)

tRAS(a)

ACTc READAa ACTd READAb ACTa READAc

tRCD(b)

tRAS(b)

tRP

tRCD(c)

tRAS(c)

tRCD(d)

tRAS(d)

Preamble

CL(a)

Postamble Preamble

CL(b)

Q0a Q1a

Q0b Q1b

ACTa/b/c/d : Bank Act. CMD of bank a/b/c/d

READAa/b/c/d : Read with Auto Pre.CMD of bank a/b/c/d

APa/b/c/d : Auto Pre. of bank a/b/c/d

APa

APb

11.22 4 Bank Interleave Read Operation (CL = 2, BL = 4)

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Publication Release Date:Mar. 17, 2010

Revision A04

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