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W77LE532_07 Datasheet, PDF (4/88 Pages) Winbond – 8-BIT MICROCONTROLLER
W77LE532/W77L532A
4. PIN DESCRIPTION
SYMBOL
EA
TYPE
DESCRIPTIONS
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of
external ROM. It should be kept high to access internal ROM. The ROM
I address and data will not be present on the bus if EA pin is high and the
program counter is within 32 KB area. Otherwise they will be present on the
bus.
PSEN
PROGRAM STORE ENABLE: PSEN enables the external ROM data onto the
O Port 0 address/data bus during fetch and MOVC operations. When internal
ROM access is performed, no PSEN strobe signal outputs from this pin.
ALE
RST
XTAL1
XTAL2
VSS
VDD
P0.0−P0.7
P1.0−P1.7
O
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
separates the address from the data on Port 0.
I
RESET: A high on this pin for two machine cycles while the oscillator is running
resets the device.
I
CRYSTAL1: This is the crystal oscillator input. This pin may be driven by an
external clock.
O CRYSTAL2: This is the crystal oscillator output. It is the inversion of XTAL1.
I GROUND: Ground potential
I POWER SUPPLY: Supply voltage for operation.
PORT 0: Port 0 is an open-drain bi-directional I/O port. This port also provides a
I/O multiplexed low order address/data bus during accesses to external memory.
Port 0 has internal pull-up resisters enabled by software.
PORT 1: Port 1 is a bi-directional I/O port with internal pull-ups. The bits have
alternate functions which are described below:
T2(P1.0): Timer/Counter 2 external count input
T2EX(P1.1): Timer/Counter 2 Reload/Capture/Direction control
RXD1(P1.2): Serial port 2 RXD
I/O TXD1(P1.3): Serial port 2 TXD
INT2(P1.4): External Interrupt 2
INT3 (P1.5): External Interrupt 3
INT4(P1.6): External Interrupt 4
INT5 (P1.7): External Interrupt 5
P2.0−P2.7
PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups. This port also
I/O
provides the upper address bits for accesses to external memory. The P2.6 and
P2.7 also provide the alternate function /REBOOT which is H/W reboot from LD
flash.
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