W77LE532_07 Datasheet, PDF (23/88 Pages) Winbond – 8-BIT MICROCONTROLLER

W77LE532/W77L532A
PORT 3
Bit:
7
6
5
4
3
2
1
0
P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0
Mnemonic: P3
Address: B0h
P3.7-0: General purpose I/O port. Each pin also has an alternate input or output function. The
alternate functions are described below.
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
RD
WR
T1
T0
INT1
INT0
TxD
RxD
Strobe for read from external RAM
Strobe for write to external RAM
Timer/counter 1 external count input
Timer/counter 0 external count input
External interrupt 1
External interrupt 0
Serial port 0 output
Serial port 0 input
INTERRUPT PRIORITY
Bit:
7
-
6
5
4
3
2
1
0
PS1 PT2
PS
PT1 PX1 PT0 PX0
IP.7:
PS1:
PT2:
PS:
PT1:
PX1:
PT0:
PX0:
Mnemonic: IP
Address: B8h
This bit is un-implemented and will read high.
This bit defines the Serial port 1 interrupt priority. PS = 1 sets it to higher priority level.
This bit defines the Timer 2 interrupt priority. PT2 = 1 sets it to higher priority level.
This bit defines the Serial port 0 interrupt priority. PS = 1 sets it to higher priority level.
This bit defines the Timer 1 interrupt priority. PT1 = 1 sets it to higher priority level.
This bit defines the External interrupt 1 priority. PX1 = 1 sets it to higher priority level.
This bit defines the Timer 0 interrupt priority. PT0 = 1 sets it to higher priority level.
This bit defines the External interrupt 0 priority. PX0 = 1 sets it to higher priority level.
SLAVE ADDRESS MASK ENABLE
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADEN
Address: B9h
SADEN: This register enables the Automatic Address Recognition feature of the Serial port 0. When
a bit in the SADEN is set to 1, the same bit location in SADDR will be compared with the
incoming serial data. When SADEN.n is 0, then the bit becomes a "don't care" in the
comparison. This register enables the Automatic Address Recognition feature of the Serial
port 0. When all the bits of SADEN are 0, interrupt will occur for any incoming address.
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Publication Release Date: February 1, 2007
Revision A7