W742E Datasheet, PDF (37/60 Pages) Winbond – 4 BIT MICROCONTROLLER

W742E/C811
T1
T2
T3
T4
Ins.
P0.0
data changed at falling edge
SOP R
1234 56 78
P0.0
data changed at rising edge
1234 56 78
Data latch
BUSYO
(PSR2.3)
EVF5
P0.1
NOTE: The serial clock frequency is fosc/2
Figure 5-13 Timing of the Serial Output Function (SOP R)
Port Status Register 2 (PSR2)
Port status register 2 is organized as 4-bit binary register (PSR2.0 to PSR2.3). PSR2 is controlled
by the MOVA R, PSR2, and CLR PSR2 instructions. The bit descriptions are as follows:
3
2
1
0
PSR2 R
R
Note: R means read only.
Bit 0 is reserved.
Bit 1 (BUSYI): Serial port input busy flag.
Bit 2 is reserved.
Bit 3 (BUSYO): Serial port output busy flag.
5.19 Input Ports RC
Port RC consists of pins RC.0 to RC.3. Each pin of port RC can be connected to a pull-high resistor,
which is controlled by the port mode 0 register (PM0). When the PEF, HEF, and IEF corresponding to
the RC port are set, a signal change at the specified pins of port RC will execute the hold mode
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Publication Release Date: December 2000
Revision A1