W9812G2GH Datasheet, PDF (36/42 Pages) Winbond – a high-speed synchronous dynamic random access memory (SDRAM), organized as 1,048,576 words × 4 banks × 32 bits

W9812G2GH
11.16 Auto-precharge Timing (Write Cycle)
0
1
2
3
4
5
6
7
8
9
10 11
12
CLK
(1) CAS Latency = 2
(a) burst length = 1
Command Write
tWR
DQ
D0
(b) burst length = 2
Command Write
DQ
D0
D1
(c) burst length = 4
Command Write
DQ
D0
D1
(d) burst length = 8
Command Write
DQ
D0
D1
(2) CAS Latency = 3
(a) burst length = 1
Command
Write
tWR
DQ
D0
(b) burst length = 2
Command Write
DQ
D0
D1
(c) burst length = 4
Command Write
DQ
D0
D1
(d) burst length = 8
Command Write
DQ
D0
D1
AP
tWR
D2
D2
AP
tWR
D2
D2
Act
tRP
AP
Act
tRP
AP
tWR
D3
D3
D4
D5
Act
tRP
AP
tRP
AP
tWR
D3
D3
D4
D5
Act
tRP
D6
D7
Act
tRP
D6
D7
AP
tWR
Act
AP
tWR
Act
tRP
A^Ac^ct^t
tRP
Note )
Write
represents the Write with Auto precharge command.
AP
represents the start of internal precharing.
Act
represents the Bank Active command.
When the /auto precharge command is asserted,the period from Bank Activate
command to the start of intermal precgarging must be at least tRAS (min).
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Publication Release Date: Aug. 13,2007
Revision A07