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W9812G2GH Datasheet, PDF (16/42 Pages) Winbond – a high-speed synchronous dynamic random access memory (SDRAM), organized as 1,048,576 words × 4 banks × 32 bits
W9812G2GH
Notes:
1. Operation exceeds “Absolute Maximum Ratings” may cause permanent damage to the devices.
2. All voltages are referenced to VSS
3. These parameters depend on the cycle rate and listed values are measured at a cycle rate with the
minimum values of tCK and tRC.
4. These parameters depend on the output loading conditions. Specified values are obtained with
output open.
5. Power up sequence is further described in the “Functional Description” section.
6. AC Testing Conditions
PARAMETER
Output Reference Level
Output Load
Input Signal Levels (VIH/VIL)
Transition Time (tT: tr/tf) of Input Signal
Input Reference Level
CONDITIONS
1.4V
See diagram below
2.4V/0.4V
1/1 nS
1.4V
output
Z = 50 ohms
1.4 V
50 ohms
30pF
AC TEST LOAD
7. Transition times are measured between VIH and VIL.
8. tHZ defines the time at which the outputs achieve the open circuit condition and is not referenced to
output level.
9. Assumed input rise and fall time (tT) = 1nS.
If tr & tf is longer than 1nS, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]nS should be added to the parameter
(The tT maximum can’t be more than 10nS for low frequency application.)
10. If clock rising time (tT) is longer than 1nS, (tT/2-0.5)nS should be added to the parameter.
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Publication Release Date: Aug. 13,2007
Revision A07