W9812G2GH Datasheet, PDF (2/42 Pages) Winbond – a high-speed synchronous dynamic random access memory (SDRAM), organized as 1,048,576 words × 4 banks × 32 bits

W9812G2GH
9.5 AC Characteristics and Operating Condition....................................................................... 15
10 TIMING WAVEFORMS.................................................................................................................. 17
10.1 Command Input Timing ....................................................................................................... 17
10.2 Read Timing ........................................................................................................................ 18
10.3 Control Timing of Input/Output Data.................................................................................... 19
10.4 Mode Register Set Cycle..................................................................................................... 20
11 Operating Timing Example ............................................................................................................ 21
11.1 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3)............................................. 21
11.2 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge).................. 22
11.3 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)............................................. 23
11.4 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge).................. 24
11.5 Interleaved Bank Write (Burst Length = 8) .......................................................................... 25
11.6 Interleaved Bank Write (Burst Length = 8, Auto-precharge) ............................................... 26
11.7 Page Mode Read (Burst Length = 4, CAS Latency = 3) ..................................................... 27
11.8 Page Mode Read / Write (Burst Length = 8, CAS Latency = 3).......................................... 28
11.9 Auto-precharge Read (Burst Length = 4, CAS Latency = 3)............................................... 29
11.10 Auto-precharge Write (Burst Length = 4) ............................................................................ 30
11.11 Auto Refresh Cycle.............................................................................................................. 31
11.12 Self Refresh Cycle............................................................................................................... 32
11.13 Burst Read and Single Write (Burst Length = 4, CAS Latency = 3).................................... 33
11.14 Power Down Mode .............................................................................................................. 34
11.15 Auto-precharge Timing (Read Cycle).................................................................................. 35
11.16 Auto-precharge Timing (Write Cycle) .................................................................................. 36
11.17 Timing Chart of Read to Write Cycle................................................................................... 37
11.18 Timing Chart of Write to Read Cycle................................................................................... 37
11.19 Timing Chart of Burst Stop Cycle (Burst Stop Command) .................................................. 38
11.20 Timing Chart of Burst Stop Cycle (Precharge Command) .................................................. 38
11.21 CKE/DQM Input Timing (Write Cycle) ................................................................................. 39
11.22 CKE/DQM Input Timing (Read Cycle)................................................................................. 40
12 Package Specification ................................................................................................................... 41
12.1 86L TSOP (II)-400 mil.......................................................................................................... 41
13 REVISION HISTORY..................................................................................................................... 42
Publication Release Date: Aug. 13,2007
-2-
Revision A07