W29GL256PL9T-TR Datasheet, PDF (24/64 Pages) Winbond – 256M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE

W29GL256P
Wait 500µs
Read DQ[7:0] twice
DQ0=
‘1’ (Erase) or
‘0’ (Program)
YES
Pass
IPB instruction set entry
Program IPB
Read DQ[7:0] twice
NO
DQ6=Toggle
?
YES
NO
DQ5=1?
YES
Read DQ[7:0] twice
NO
DQ6=Toggle
?
YES
NO
Program Fail Write Reset CMD
Figure 6-3
IPB instruction set Exit
IPB Program Algorithm
Note:
1.
IPB program/erase status polling flowchart: Check DQ6 toggle, when DQ6 stop toggle, the read status is 00h/01h (00h
for program and 01h for erase, otherwise the status is “fail’ and “exit”.
6.3.2.3 Individual Protection Bit Lock Bit
The Individual Protection Bit Lock Bit (IPBLK) is a global lock bit to control all IPB states. It is a singular
volatile bit. If the IPBLK is set (“0”), all IPB are locked and all sectors are protected or unprotected
according to their individual IPB. When IPBLK=1 (cleared), all IPB are unlocked and allowed to be set
or cleared.
To clear the IPB Lock Bit, a hardware reset or a power-up cycle must be executed.
.
Publication Release Date: Jul 02, 2014
19
Revision A