W83759A Datasheet, PDF (19/41 Pages) Winbond – ADVANCED VL-IDE DISK CONTROLLER

W83759A
Continued
CRX86h (ALTCTL)
Read / Write
Alternative Control Register
Bit 7
DMASL _P
Bit 6
Bit 5
Reserved EMD1
Bit 4
EMD0
Bit 3
Bit 2
Bit 1
Bit 0
PEMD1_P PEMD0_P SEMD1_P SEMD0_P
Bit 7
Bit 6
Bit5−4
Bit3−2
Bit1−0
DMASL _P
Reserved
EMD1, 0
(Read Only)
PEMD1, 0_P
SEMD1, 0_P
Power-on setting value of VGAOEL pin.
After power-on, this bit can be programmed to modify
the DMA disable/enable power-on setting.
0 DMA mode enabled if SUSPEN_P = 0 and
ADV_P = 1
1 DMA mode disabled
0 (default)
Inverse of power-on setting value of IDEIOR , IDEIOW
pin
Initial setting of enhanced timing of IDE0 and IDE1
EMD1 EMD0 ATA PIO Mode Cycle time (nS)
0
0
2
240
0
1
3
80
1
0
3
80
1
1
4
120
Initial setting of primary drive enhanced timing
After power-on, these bits can be programmed to modify
the primary drive enhanced timing.
PEMD1_P PEMD0_P ATA PIO mode Cycle time (nS)
0
0
2
240
0
1
3
180
1
0
3
180
1
`1
4
120
Initial setting of secondary drive enhanced timing
After power-on, these bits can be programmed to modify
the secondary drive enhanced timing
SEMD1_P SEMD0_P ATA PIO Mode Cycle time (nS)
0
0
2
240
0
1
3
180
1
0
3
180
1
1
4
120
- 19 -
Publication Release Date: May 1995
Revision A1