W79E548 Datasheet, PDF (19/79 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E548/W79L548
P4.3 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
0
A15 A14 A13 A12 A11 A10
A9
A8
Mnemonic: P43AH
Address: 9Dh
ISP Control Register
Bit:
7
6
5
4
3
2
1
0
SWRST/HWB - LDAP
-
-
- LDSEL ENP
Mnemonic: CHPCON
Address: 9Fh
SWRST/HWB: Set this bit to launch a whole device reset that is same as asserting high to RST pin,
micro controller will be back to initial state and clear this bit automatically. To read this
bit, its alternate function to indicate the ISP hardware reboot mode is invoking when
read it in high.
LDAP: This bit is Read Only. High: device is executing the program in LDFlash. Low: device is
executing the program in APFlashs.
LDSEL: Loader program residence selection. Set to high to route the device fetching code from
LDFlash.
ENP: In System Programming Mode Enable. Set this be to launch the ISP mode. Device will operate
ISP procedures, such as Erase, Program and Read operations, according to correlative SFRs
settings. During ISP mode, device achieves ISP operations by the way of IDLE state. In the
other words, device is not indeed in IDLE mode is set bit PCON.1 while ISP is enabled. Clear
this bit to disable ISP mode, device get back to normal operation including IDLE state.
Software Reset
Set CHPCON = 0X83, timer and enter IDLE mode. CPU will reset and restart from APFlash after time
out.
Port 2
Bit:
7
6
5
4
3
2
1
0
P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
Mnemonic: P2
Address: A0h
P2.7-0: Port 2 is a bi-directional I/O port with internal pull-ups. This port also provides the upper
address bits for accesses to external memory.
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Publication Release Date: December 12, 2005
Revision A1