W19B320B Datasheet, PDF (14/51 Pages) Winbond – 32Mbit, 2.7~3.6-volt single bank CMOS flash memory

W19B320BT/B DATASHEET
During the Embedded Program algorithm, the device outputs on DQ7 and the complement of the data
programmed to DQ7. Once the Embedded Program algorithm has completed that the device outputs
the data programmed to DQ7. The system must provide the program address to read valid status
information on DQ7. If a program address falls within a protected sector, #Data Polling on DQ7 is active
for about 1μs, and then that bank returns to the read mode.
During the Embedded Erase algorithm, #Data Polling produces “0” on DQ7. Once the Embedded Erase
algorithm has completed, #Data Polling produces “1” on DQ7. An address within any of the sectors
selected for erasure must be provided to read valid status information on DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected, #Data
Polling on DQ7 is active for about 100 μs, and then the bank returns to the read mode. If not all
selected sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and
ignores the selected sectors that are protected. However, if the system reads DQ7 at an address within
a protected sector, the status may not be valid.
Just before the completion of an Embedded Program or Erase operation, DQ7 may change
asynchronously with DQ0-DQ6 while Output Enable (#OE) is set to low. That is, the device may change
from providing status information to valid data on DQ7. Depending on when it samples the DQ7 output,
the system may read the status or valid data. Even if the device has completed the program or erase
operation and DQ7 has valid data, the data outputs on DQ0-DQ6 may be still invalid. Valid data on
DQ0-DQ7 will appear on successive read cycles.
6.3.2 RY/#BY: Ready/#Busy
The RY/#BY is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in
progress or complete. The RY/#BY status is valid after the rising edge of the final #WE pulse in the
command sequence. Since RY/#BY is an open-drain output, several RY/#BY pins can be tied together in
parallel with a pull-up resistor to V_DD.
When the output is low (Busy), the device is actively erasing or programming. When the output is high
(Ready), the device is in the read mode or the standby mode.
6.3.3 DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete.
Toggle Bit I may be read at any address, and is valid after the rising edge of the final #WE pulse in the
command sequence (before the program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. The system may use either #OE or #CE to control the read cycles. Once the operation has
completed, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6
toggles for about 100 μs, and then returns to reading array data. If not all selected sectors are
protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected
sectors which are protected.
If a program address falls within a protected sector, DQ6 toggles for about 1 μs after the program
command sequence is written, and then returns to reading array data.
6.3.4 Reading Toggle Bits DQ6/DQ2
Whenever the system initially starts to read toggle bit status, it must read DQ0-DQ7 at least twice in a row to
determine whether a toggle bit is toggling or not. Typically, the system would note and store the value of the
toggle bit after the first read. While after the second read, the system would compare the new value of the
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Publication Release Date:Dec, 22, 2008
Revisionv A5