W83194R-67B Datasheet, PDF (11/18 Pages) Winbond – 100MHZ 3-DIMM CLOCK FOR VIA MVP4

W83194R-67B
PRELIMINARY
9.0 SPECIFICATIONS
9.1 ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed in this table may cause permanent damage to the device.
Precautions should be taken to avoid application of any voltage higher than the maximum rated
voltages to this circuit. Maximum conditions for extended periods may affect reliability. Unused
inputs must always be tied to an appropriate logic voltage level (Ground or Vdd).
Symbol
Vdd , V_IN
T_STG
T_B
T_A
Parameter
Voltage on any pin with respect to GND
Storage Temperature
Ambient Temperature
Operating Temperature
Rating
- 0.5 V to + 7.0 V
- 65°C to + 150°C
- 55°C to + 125°C
0°C to + 70°C
9.2 AC CHARACTERISTICS
Vddq1=Vddq2 = Vddq3 = Vddq4 =3.3V , VddL1 =VddL2= 2.5V , T_A = 0°C to +70°C
Parameter
Symbol Min Typ
Max
Units
Test Conditions
Output Duty Cycle
45 50
55
% Measured at 1.5V
CPU/SDRAM to PCI Offset _tOFF
1
Skew (CPU-CPU), (PCI- _tSKEW
PCI), (SDRAM-SDRAM)
4
ns 15 pF Load Measured at 1.5V
250
ps 15 pF Load Measured at 1.5V
CPU/SDRAM
t_CCJ
Cycle to Cycle Jitter
±250
ps
CPU/SDRAM
tJA
Absolute Jitter
500
ps
Jitter Spectrum 20 dB
Bandwidth from Center
BWJ
500 KHz
Output Rise (0.4V ~ 2.0V)
& Fall (2.0V ~0.4V) Time
Overshoot/Undershoot
Beyond Power Rails
tTLH
0.4
tTHL
Vover
1.6
ns 15 pF Load on CPU and PCI
outputs
1.5
V 22 Ω at source of 8 inch PCB
run to 15 pF load
Ring Back Exclusion
VRBE
2.1
V Ring Back must not enter this
range.
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Publication Release Date: Dec.. 1999
Revision 0.50