WCMB2016R4X Datasheet, PDF (4/11 Pages) Weida Semiconductor, Inc. – 128K x 16 Static RAM

AC Test Loads and Waveforms
R1
V_CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
V_CC Typ
GND
10%
90%
90%
10%
R2
Rise Time:
Fall Time:
1 V/ns
1 V/ns
WCMB2016R4X
Equivalent to:
THÉVENIN EQUIVALENT
OUTPUT
RTH
V
Parameters
R1
R2
R_TH
V_TH
1.8V
13500
10800
6000
0.80
UNIT
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
Conditions
Min.
Typ.^[4]
Max.
Unit
V_DR
I_CCDR
t_CDR[5]
t_R[6]
V_CC for Data Retention
1.0
1.95
V
Data Retention Current
V_CC = 1.0V
CE > V_CC − 0.2V,
V_IN > V_CC − 0.2V or V_IN < 0.2V
0.5
5
µA
Chip Deselect to Data
Retention Time
0
ns
Operation Recovery Time
t_RC
ns
Data Retention Waveform^[7]
V_CC
CE or
BHE.BLE
V_CC(min.)
t_CDR
DATA RETENTION MODE
V_DR > 1.0 V
V_CC(min.)
t_R
Notes:
6. Full device operation requires linear V_CC ramp from V_DR to V_CC(min) > 100 µs or stable at V_CC(min) > 100 µs.
7. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
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