W3E32M64S-XBX Datasheet, PDF (11/17 Pages) White Electronic Designs Corporation – 32Mx64 DDR SDRAM

White Electronic Designs
W3E32M64S-XBX
DC Electrical Characteristics And Operating Conditions (Notes 1, 6)
VCC = +2.5V ± 0.2V; -55°C ≤ TA ≤ +125°C
Parameter/Condition
Supply Voltage
I/O Supply Voltage
Input Leakage Current: Any input 0V ≤ VIN ≤ VCC (All other pins not under test = 0V)
Input Leakage Address Current (All other pins not under test = 0V)
Output Leakage Current: I/Os are disabled; 0V ≤ VOUT ≤ VCC
Output Levels: Full drive option
High Current (VOUT = VCCQ - 0.373V, minimum VREF, minimum VTT)
Low Current (VOUT = 0.373V, maximum VREF, maximum VTT)
Output Levels: Reduced drive option
High Current (VOUT = VCCQ - 0.763V, minimum VREF, minimum VTT)
Low Current (VOUT = 0.763V, maximum VREF, maximum VTT)
I/O Reference Voltage
I/O Termination Voltage
Symbol
VCC
VCCQ
II
II
IOZ
IOH
IOL
IOHR
IOLR
VREF
VTT
Min
2.3
2.3
-2
-8
-5
-16.8
16.8
-9
9
0.49 x VCCQ
VREF - 0.04
Max
2.7
2.7
2
8
5
–
–
–
–
0.51 x VCCQ
VREF + 0.04
Units
V
V
µA
µA
µA
mA
mA
mA
mA
V
V
Parameter/Condition
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
AC INPUT OPERATING CONDITIONS
VCC, VCCQ = +2.5V ± 0.2V; -55°C ≤ TA ≤ +125°C
Symbol
VIH
VIL
Min
VREF + 0.5
-
Max
-
VREF - 0.5
Units
V
V
ICC SPECIFICATIONS AND CONDITIONS (NOTES 1-5, 10, 12, 14)
VCC, = +2.5V ± 0.2V; -55°C ≤ TA ≤ +125°C
Parameter/Condition
OPERATING CURRENT: One bank; Active-Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM, and DQS inputs
changing once per clock cycle; Address and control inputs changing once every two clock cycles; (22, 48)
OPERATING CURRENT: One bank; Active-Read-Precharge; Burst = 2; tRC = tRC (MIN); tCK = tCK (MIN); IOUT = 0mA;
Address and control inputs changing once per clock cycle (22, 48)
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; Power-down mode; tCK = tCK (MIN); CKE =
LOW; (23, 32, 50)
IDLE STANDBY CURRENT: CS# = HIGH; All banks idle; tCK = tCK (MIN); CKE = HIGH; Address and other control
inputs changing once per clock cycle. VIN = VREF for DQ, DQS, and DM (51)
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; Power-down mode; tCK = tCK (MIN); CKE = LOW
(23, 32, 50)
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One bank; Active-Precharge; tRC = tRAS (MAX); tCK = tCK
(MIN); DQ, DM, and DQS inputs changing twice per clock cycle; Address and other control inputs changing once per
clock cycle (22)
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank active; Address and control inputs changing
once per clock cycle; tCK = tCK (MIN); IOUT = 0mA (22, 48)
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One bank active; Address and control inputs changing
once per clock cycle; tCK = tCK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle (22)
AUTO REFRESH CURRENT
tREF = tRC (MIN) (27, 50)
tREF = 7.8125µs (27, 50)
SELF REFRESH CURRENT: CKE ≤ 0.2V
Standard (11)
OPERATING CURRENT: Four bank interleaving READs (BL=4) with auto precharge, tRC =tRC (MIN); tCK = tCK (MIN);
Address and control inputs change only during Active READ or WRITE commands. (22, 49)
Symbol
ICC0
333Mbs
520
MAX
250Mbs
266Mbs 200Mbs
520
460
ICC1
640
640
580
ICC2P
20
20
20
ICC2F
180
180
160
ICC3P
140
140
120
ICC3N
200
200
180
ICC4R
ICC4W
ICC5
ICC5A
ICC6
ICC7
660
975
1,160
40
20
2,025
660
800
1,160
40
20
1,620
580
540
1,120
40
20
1,400
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
July 2006
Rev. 3
11
White Electronic Designs Corporation • [phone] • www.wedc.com