VSC7125 Datasheet, PDF (5/16 Pages) Vitesse Semiconductor Corporation – 1.0625 Gbits/sec Fibre Channel Transceiver

Data Sheet
VSC7125
VITESSE
SEMICONDUCTOR CORPORATION
Figure 4: Transmit Timing Waveforms
1.0625 Gbits/sec Fibre
Channel Transceiver
REFCLK
T0:9
10 Bit Data
Data Valid
T₁
T₂
Data Valid
Data Valid
AC Characteristics
Table 1: Transmit AC Characteristics
Parameters
T₁
T₂
T_SDR,T_SDF
T_LAT
T_rj
T_DJ
Description
Min
Max Units
T0:9 Setup time to the rising
edge of REFCLK
1.5
—
ns.
T0:9 hold time after the
rising edge of REFCLK
TX+/TX- rise and fall time
1.0
—
ns.
—
300
ps.
Latency from rising edge of
REFCLK to T0 appearing on 11bc - 1ns
ns.
TX+/TX-
Transmitter Output Jitter Allocation
Serial data output random
jitter (RMS)
—
20
ps.
Serial data output
deterministic jitter (p-p)
—
100
ps.
Conditions
Measured between the valid
data level of T0:9 to the 1.4V
point of REFCLK
20% to 80%, 75 Ohm load to
Vss, Tested on a sample basis
bc = Bit clocks
ns = Nano second
RMS, tested on a sample basis
(refer to Figure 8)
Peak to peak, tested on a sample
basis (refer to Figure 8)
G52121-0, Rev. 4.1
4/23/98
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
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