SI8447DB Datasheet, PDF (8/9 Pages) Vishay Siliconix – P-Channel 20-V (D-S) MOSFET

Si8447DB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 6-BUMP (2 x 3, 0.5 mm PITCH)
A
1
6 x Ø 0.24 to 0.26 Note 3
Solder Mask ~ Ø 0.25
B
C
2
e
e
Recommended Land
8447
XXX
Mark on Backside of Die
Bump Note 2
6xØb
D
S
S
D
S
G
s
e
e
s
E
Notes (Unless otherwise specified):
1. All dimensions are in millimeters.
2. Six (6) solder bumps are lead (Pb)-free 95.5Sn/3.8Ag/0.7Cu with diameter ∅ 0.30 mm to 0.32 mm.
3. Backside surface is coated with a Ti/Ni/Ag layer.
4. Non-solder mask defined copper landing pad.
·5. is location of pin 1.
Dim.
A
A₁
A₂
b
e
s
D
E
Min.
0.510
0.220
0.290
0.300
0.230
0.920
1.420
Millimeters^a
Nom.
0.575
0.250
0.300
0.310
0.500
0.250
0.960
1.460
Notes:
a. Use millimeters as the primary measurement.
Max.
0.590
0.280
0.310
0.320
0.270
1.000
1.500
Min.
0.0201
0.0087
0.0114
0.0118
0.0090
0.0362
0.0559
Inches
Nom.
0.0224
0.0098
0.0118
0.0122
0.0197
0.0098
0.0378
0.0575
Max.
0.0232
0.0110
0.0122
0.0126
0.0106
0.0394
0.0591
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?64802.
www.vishay.com
8
Document Number: 64802
S-09-0664-Rev. A, 20-Apr-09