SI8809EDB Datasheet, PDF (7/8 Pages) Vishay Siliconix – P-Channel 20 V (D-S) MOSFET

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Package Information
Vishay Siliconix
MICRO FOOT^®: 4-Bump (0.8 mm x 0.8 mm, 0.4 mm Pitch)
XXX
AK
Mark on Backside of die
4-Ø 0.205 to 0.225 Note 5
Solder Mask ~Ø 0.215
D
S
e
S
4x Ø b
SS
D
G
b
b1
k
Bump Note 2
e
Note 4
Notes
(1) _{Laser mark on the backside surface of die}
(2) _{Bumps are 95.5 % Sn,3.8 % Ag,0.7 % Cu}
(3) _{“i” is the location of pin 1}
(4) _{“b1” is the diameter of the solderable substrate surface, defined by an opening in the solder resist layer solder mask defined.}
(5) _{Non-solder mask defined copper landing pad.}
DIM.
MIN.
MILLIMETERS ^a
NOM.
A
0.328
0.365
A1
0.136
0.160
A2
0.192
0.205
b
0.200
0.220
b1
0.175
e
0.400
S
0.160
0.180
D
0.720
0.760
K
0.040
0.070
Note
a. Use millimeters as the primary measurement.
MAX.
0.402
0.184
0.218
0.240
0.200
0.800
0.100
MIN.
0.0129
0.0053
0.0076
0.0078
0.0062
0.0283
0.0015
INCHES
NOM.
0.0144
0.0062
0.0081
0.0086
0.0068
0.0157
0.0070
0.0299
0.0027
MAX.
0.0158
0.0072
0.0086
0.0094
0.0078
0.0314
0.0039
ECN: T15-0053-Rev. A, 16-Feb-15
DWG: 6033
Revision: 16-Feb-15
1
Document Number: 69442
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000