SI4500DY Datasheet, PDF (2/7 Pages) Vishay Siliconix – Complementary MOSFET Half-Bridge (N- and P-Channel)

Si4500DY
Vishay Siliconix
New Product
SPECIFICATIONS (T_J = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Condition
Static
Gate Threshold Voltage
V_GS(th)
V_DS = V_GS, I_D = 250 mA
V_DS = V_GS, I_D = –250 mA
Gate-Body Leakage
I_GSS
V_DS = 0 V, V_GS = "12 V
Zero Gate Voltage Drain Current
On-State Drain Current^b
Drain-Source On-State Resistance^b
Forward Transconductance^b
Diode Forward Voltage^b
Dynamic^a
I_DSS
I_D(on)
r_DS(on)
g_fs
V_SD
V_DS = 16 V, V_GS = 0 V
V_DS = –16 V, V_GS = 0 V
V_DS = 16 V, V_GS = 0 V, T_J = 55_C
V_DS = –16 V, V_GS = 0 V, T_J = 55_C
V_DS = 5 V, V_GS = 4.5 V
V_DS = –5 V, V_GS = –4.5 V
V_GS = 4.5 V, I_D = 7.0 A
V_GS = –4.5 V, I_D = –4.5 A
V_GS = 2.5 V, I_D = 6.0 A
V_GS = –2.5 V, I_D = –3.5 A
V_DS = 15 V, I_D = 7.0 A
V_DS = –15 V, I_D = –4.5 A
I_S = 1.7 A, V_GS = 0 V
I_S = –1.7 A, V_GS = 0 V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q_g
N-Channel
V_DS = 10 V, V_GS = 4.5 V, I_D = 3.5 A
Q_gs
P-Channel
V_DS = –10 V, V_GS = –4.5 V, I_D = –4.5 A
Q_gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
t_d(on)
t_r
t_d(off)
t_f
N-Channel
V_DD = 10 V, R_L = 10 W
I_D ^ 1 A, V_GEN = 4.5 V, R_G = 6 W
P-Channel
V_DD = –10 V, R_L = 10 W
I_D ^ –1 A, V_GEN = –4.5 V, R_G = 6 W
Source-Drain Reverse Recovery Time
t_rr
Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width v 300 ms, duty cycle v 2%.
I_F = 1.7 A, di/dt = 100 A/ms
Min Typ^a Max Unit
N-Ch
0.6
V
P-Ch
–0.6
N-Ch
P-Ch
"100
nA
"100
N-Ch
P-Ch
N-Ch
P-Ch
1
–1
mA
5
–5
N-Ch
30
A
P-Ch
–20
N-Ch
P-Ch
N-Ch
P-Ch
0.022 0.030
0.058 0.065
W
0.030 0.040
0.087 0.100
N-Ch
22
S
P-Ch
10
N-Ch
P-Ch
0.70
1.2
V
–0.80 –1.2
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
13
25
8.5
15
3.0
nC
2.8
3.3
1.7
22
40
15
30
40
80
32
60
50
100
ns
57
100
20
40
40
80
40
80
40
80
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2-2
Document Number: 70880
S-00269—Rev. A, 26-Apr-99