BCM6123XD1E5126YZZ Datasheet, PDF (26/30 Pages) Vicor Corporation – Isolated Fixed-Ratio DC-DC Converter

BCM6123xD1E5126yzz
Input and Output Filter Design
A major advantage of SAC™ systems versus conventional PWM
converters is that the transformer based SAC does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as a
function of primary voltage and secondary current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
nnGuarantee low source impedance:
To take full advantage of the BCM module’s dynamic response,
the impedance presented to its primary terminals must be low
from DC to approximately 5MHz. The connection of the bus
converter module to its power source should be implemented
with minimal distribution inductance. If the interconnect
inductance exceeds 100nH, the input should be bypassed with a
RC damper to retain low source impedance and stable operation.
With an interconnect inductance of 200nH, the RC damper
may be as high as 1µF in series with 0.3Ω. A single electrolytic
or equivalent low-Q capacitor may be used in place of the
series RC bypass.
nnFurther reduce primary and/or secondary voltage ripple without
sacrificing dynamic response:
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the primary source will appear at
the secondary of the module multiplied by its K factor.
nnProtect the module from overvoltage transients imposed by the
system that would exceed maximum ratings and induce stresses:
The module primary/secondary voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating primary range. Even
when disabled, the powertrain is exposed to the applied voltage
and power MOSFETs must withstand it.
Total load capacitance at the secondary of the BCM module shall
not exceed the specified maximum. Owing to the wide bandwidth
and low secondary impedance of the module, low-frequency
bypass capacitance and significant energy storage may be more
densely and efficiently provided by adding capacitance at the
primary of the module. At frequencies <500kHz the module
appears as an impedance of R_SEC between the source and load.
Within this frequency range, capacitance at the primary appears as
effective capacitance on the secondary per the relationship
defined in Eq. (13).
C_{SEC_EXT}
=
C_{PRI_EXT}
K²
(13)
This enables a reduction in the size and number of capacitors used
in a typical system.
Thermal Considerations
The ChiP package provides a high degree of flexibility in that it
presents three pathways to remove heat from internal power
dissipating components. Heat may be removed from the top
surface, the bottom surface and the leads. The extent to which
these three surfaces are cooled is a key component for determining
the maximum current that is available from a ChiP, as can be
seen from Figure 1.
Since the ChiP has a maximum internal temperature rating, it is
necessary to estimate this internal temperature based on a real
thermal solution. Given that there are three pathways to remove
heat from the ChiP, it is helpful to simplify the thermal solution into
a roughly equivalent circuit where power dissipation is modeled as
a current source, isothermal surface temperatures are represented
as voltage sources and the thermal resistances are represented as
resistors. Figure 22 shows the “thermal circuit” for a VI Chip^® BCM
module 6123 in an application where the top, bottom, and leads
are cooled. In this case, the BCM power dissipation is PD_TOTAL and
the three surface temperatures are represented as T_{CASE_TOP},
T_{CASE_BOTTOM}, and T_LEADS. This thermal system can now be very
easily analyzed using a SPICE simulator with simple resistors,
voltage sources, and a current source. The results of the simulation
would provide an estimate of heat flow through the various
pathways as well as internal temperature.
Power Dissipation (W)
Thermal Resistance Top
ΦINT-TOP
MAX INTERNAL TEMP
Thermal Resistance Bottom
ΦINT-BOTTOM
T_{CASE_BOTTOM}(°C)
+
–
Thermal Resistance Leads
ΦINT-LEADS
T (°C) +
LEADS
–
T_{CASE_TOP}(°C)
+
–
Figure 22 — Top case, Bottom case and leads thermal model
Alternatively, equations can be written around this circuit and
analyzed algebraically:
T_INT – PD₁ • Φ_INT-TOP = T_{CASE_TOP}
T_INT – PD₂ • Φ_INT-BOTTOM = T_{CASE_BOTTOM}
T_INT – PD₃ • Φ_INT-LEADS = T_LEADS
PD_TOTAL = PD₁+ PD₂+ PD₃
Where T_INT represents the internal temperature and PD₁, PD₂, and
PD₃ represent the heat flow through the top side, bottom side, and
leads respectively.
Power Dissipation (W)
Thermal Resistance Top
ΦINT-TOP
Thermal Resistance Bottom
ΦINT-BOTTOM
T_{CASE_BOTTOM}(°C)
MAX INTERNAL TEMP
Thermal Resistance Leads
ΦINT-LEADS
T_LEADS(°C)
+
–
T_{CASE_TOP}(°C)
+
–
BCM^® Bus Converter
Page 26 of 30
Rev 1.1
01/2017
Figure 23 — Top case and leads thermal model
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