BCM6123XD1E5126YZZ Datasheet, PDF (25/30 Pages) Vicor Corporation – Isolated Fixed-Ratio DC-DC Converter

BCM6123xD1E5126yzz
A similar exercise should be performed with the additon of
a capacitor or shunt impedance at the primary input to the
SAC. A switch in series with V_PRI is added to the circuit. This is
depicted in Figure 21.
S
+
VV_Pi_Rn_{I –}
C
S_SA_AC_C™
K^K=⁼1¹/3^/82
V_VSoECut
Figure 21 — Sine Amplitude Converter with primary capacitor
A change in V_PRI with the switch closed would result in a change in
capacitor current according to the following equation:
I_C (t)
=
C
dV_PRI
dt
(7)
Assume that with the capacitor charged to V_PRI, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
I_C = I_SEC • K
(8)
substituting Eq. (1) and (8) into Eq. (7) reveals:
C
I_SEC(t) = _{K 2}
•
dV_SEC
dt
(9)
The equation in terms of the output has yielded a K² scaling factor
for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With a
K = 1/8 as shown in Figure 21, C = 1µF would appear as
C = 64µF when viewed from the secondary.
Low impedance is a key requirement for powering a high-
current, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e. well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss core
material at high frequencies also reduces core losses.
The two main terms of power loss in the BCM module are:
nnNo load power dissipation (P_{PRI_NL}): defined as the power
used to power up the module with an enabled powertrain
at no load.
nnResistive loss (P_RSEC): refers to the power loss across
the BCM module modeled as pure resistive impedance.
P = P + P _DISSIPATED
PRI_NL
RSEC
Therefore,
(10)
P = P – P = P – P – P (11) _{SEC_OUT}
PRI_IN
DISSIPATED
PRI_IN
PRI_NL
RSEC
The above relations can be combined to calculate the overall
module efficiency:
η
=
P_{SEC_OUT}
P_{PRI_IN}
=
P_{PRI_IN} – P_{PRI_NL} – P_RSEC
P_{PRI_IN}
(12)
( ) ₌
V_PRI
•
I_PRI
–
P_{PRI_NL} –
V_PRI • I_PRI
I_SEC
2 _{• RSEC}
( ) ^{= 1 –}
( ) P_{PRI_NL} + I_SEC ² • R_SEC
V_PRI • I_PRI
BCM^® Bus Converter
Page 25 of 30
Rev 1.1
01/2017
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