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TLD4012 Datasheet, PDF (11/13 Pages) Tripath Technology Inc. – ADSL LINE DRIVER USING TRIPATH DIGITAL POWER PROCESSING (DPP™) TECHNOLOGY
Tripath Technology, Inc. - Technical Information
APPLICATION INFORMATION
Power Dissipation Derating for 5x5mm TQFP with Exposed Die Pad
For operating at ambient temperatures above 25°C the device power dissipation, PDISS, must be de-rated
based on a 150°C maximum junction temperature TJ (max) as given by the following equation:
PDISS = (TJ(max) – TA)/θJA
Where θJA of the package is determined from the table, and TA is the ambient temperature.
Airflow
(LFPM)
0
200
500
θJA,C/W
(Copper Pad Soldered To PCB)
5x5mm
34.5
29.1
27.2
Values apply when the exposed pad is soldered to a JEDEC standard test board.
Note that PDISS is the power dissipated on the chip, not PCONS which is the power consumed from the
supplies.
The TLD4012 incorporates an exposed die pad on the underside of its package. This acts as a heat sink
and should be connected to a copper plane on the printed circuit board for optimum heat dissipation. This
copper plane must be connected to VSS15.
11
TLD4012 – JB/Rev. 2.0a/05.02