TC55NEM216AFTN55 Datasheet, PDF (9/11 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55NEM216AFTN55,70
Note:
(1)
(2)
(3)
When CE is operating at the VIH(min.) level(2.2 V), the operating current is given by IDDS1 during the
transition of VDD from 4.5 to 2.4 V.
In UB (or LB ) controlled data retention mode, minimum standby current mode is entered when CE ≤
0.2 V or CE ≥ VDD − 0.2 V.
When UB (or LB ) is operating at the VIH(min.) level(2.2 V), the operating current is given by IDDS1
during the transition of VDD from 4.5 to 2.4 V.
2002-07-04 9/11