TC55NEM216AFTN55 Datasheet, PDF(4/11 Page) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

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TC55NEM216AFTN55 Datasheet, PDF (4/11 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

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TC55NEM216AFTN55,70

DC CHARACTERISTICS (Ta = â40Â° to 85Â°C, VDD = 5 V Â± 10%)

SYMBOL PARAMETER

TEST CONDITION

IIL

IOH

IOL

ILO

lDDO1

lDDO2

Input Leakage

Current

Output High Current

Output Low Current

Output Leakage

Current

Operating Current

VIN = 0 V~VDD

VOH = 2.4 V

VOL = 0.4 V

CE = VIH or LB = UB = VIH or

R/W = VIL or OE = VIH, VOUT = 0 V~VDD

CE = VIL and

R/W = VIH, LB = UB

IOUT = 0 mA,

Other Input = VIH/VIL

= VIL,

CE = 0.2 V and

R/W = VDD â 0.2 V, LB = UB = 0.2 V,

IOUT = 0 mA,

Other Input = VDD â 0.2 V/0.2 V

IDDS1

1) CE = VIH

2) LB = UB = VIH

IDDS2

Standby Current

1) CE = VDD â 0.2 V

2) LB = UB = VDD â 0.2 V, CE = 0.2 V

MIN TYP MAX UNIT

ï£§ ï£§ Â±1.0 ÂµA

â1.0 ï£§

2.1 ï£§

ï£§ mA

ï£§ ï£§ Â±1.0 ÂµA

tcycle

MIN

1 Âµs

ï£§ ï£§ 35

ï£§8ï£§

tcycle

MIN

1 Âµs

ï£§ ï£§ 30

ï£§3ï£§

ï£§ ï£§ 3 mA

Ta = 25Â°C

ï£§1ï£§

Ta = â40~40Â°C ï£§ ï£§ 3 ÂµA

Ta = â40~85Â°C ï£§ ï£§ 20

CAPACITANCE (Ta = 25Â°C, f = 1 MHz)

SYMBOL

PARAMETER

TEST CONDITION

CIN

COUT

Input Capacitance

Output Capacitance

VIN = GND

VOUT = GND

Note: This parameter is periodically sampled and is not 100% tested.

MAX

UNIT

2002-07-04 4/11

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