MAX11311 Datasheet, PDF (8/51 Pages) Maxim Integrated Products – PIXI, 12-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO

MAX11311
PIXI, 12-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
Interface Digital IO Electrical Specifications (continued)
(V_AVDD = 5.0V, V_DVDD = 1.62V to 5.50V, V_AVDDIO = +12.0V, V_AGND = V_DGND = 0V, V_AVSSIO = -2.0V, V_DACREF = 2.5V, V_ADCREF = 2.5V
(Internal), f_S = 400ksps, 10V analog input range set to range 1 (0 to +10V). T_A = -40°C to +105°C, unless otherwise noted. Typical values
are at T_A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
SPI TIMING REQUIREMENTS (See Figures 1 and 2)
SCLK Frequency
f_SCLK
V_DVDD = 2.50V to 5.50V
V_DVDD = 1.62V to 2.50V
SCLK Clock Period
t_CP
V_DVDD = 2.50V to 5.50V
V_DVDD = 1.62V to 2.50V
SCLK Pulse-Width High
t_CH
SCLK Pulse-Width Low
t_CL
V_DVDD = 2.50V to 5.50V
V_DVDD = 1.62V to 2.50V
CS Low to First SCLK Rise Setup
t_CSS0
24th SCLK Rising Edge to CS
Rising Edge
t_CSS1
SCLK Rise to CS Low
CS Pulse-Width High
DIN to SCLK Setup
DIN Hold After SCLK
DOUT Transition Valid After SCLK Fall
CS Rise to DOUT Disable
t_CSH0
t_CSW
t_DS
t_DH
t_DOT
t_DOD
V_DVDD = 2.50V to 5.50V
V_DVDD = 1.62V to 2.50V
C_LOAD = 20pF
MIN TYP MAX UNITS
20
MHz
10
MHz
50
ns
100
ns
10
ns
25
ns
65
ns
5
ns
5
ns
5
ns
50
ns
5
ns
5
ns
23
ns
55
ns
50
ns
tCSH0 tCSS0 tDS tDH
CS
tCP
tCH tCL
SCLK
DIN
AD6
AD5
AD2
AD1
AD0
RB/W D[N16-1] D[N16-2] D[N16-3]
DOUT
HIGH-Z
Figure 1. SPI Write Timing (N = Number of Words Written; N > 1 for Burst Mode)
tCSS1
tCSW
D[N16-12] D[N16-15] D[N16-16]
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