MAX11311 Datasheet, PDF (11/51 Pages) Maxim Integrated Products – PIXI, 12-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO

MAX11311
PIXI, 12-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
Recommended VDDIO/VSSIO Supply Selection (continued)
●● If one or more ports are in mode 11 or 12 (Analog Switch-related modes), V_AVSSIO must be set, at maximum, to
2.0V below the value of the lowest voltage applied to any of the ports functioning as analog switch terminals.
●● V_AVSSIO cannot be set higher than V_AGND.
For example, the MAX11311 can operate with only one voltage supply of 5V (±5%) connected to AVDD, AVDDIO, and
DVDD, and one ground of 0V connected to AGND, DGND, and AVSSIO. However, the level of performance presented
in the electrical specifications requires the setting of the supplies connected to AVDDIO and AVSSIO as previously
described.
Common PIXI Electrical Specifications
(V_AVDD = 4.75V to 5.25V, V_DVDD = 3.3V, V_AVDDIO = +12.0V, V_AGND = V_DGND = 0V, V_AVSSIO = -2.0V, V_DACREF = 2.5V, V_ADCREF = 2.5V
(Internal), f_S = 400ksps, 10V analog input range set to range 1 (0 to +10V). T_A = -40°C to +105°C, unless otherwise noted. Typical values
are at T_A = +25°C.) (Note 2)
PARAMETER
PIXI PORTS
Input Capacitance
Input Resistance
SYMBOL
CONDITIONS
MIN
All PIXI ports
All PIXI input ports except ADC mode
50
Startup Time
Between stable supplies and accessing
registers
HIGH-VOLTAGE OUTPUT DRIVER CHARACTERISTICS
TYP MAX UNITS
20
pF
75
100
kΩ
100
ms
Maximum Output Capacitance
250
pF
Output Low Voltage, DAC Mode
Sinking 25mA, V_AVSSIO = 0V,
AVDDIO = 10V
V_AVSSIO
+ 1.0
V
Output High Voltage, DAC Mode
Sourcing 25mA, V_AVSSIO = 0V,
V_AVDDIO = 10V
V_AVDDIO
- 1.5
V
Output Low Voltage, GPO Mode
Sinking 2mA, V_AVSSIO = 0V,
V_AVDDIO = 10V
V_AVSSIO
+ 0.4
V
Output High Voltage, GPO Mode
Sourcing 2mA, V_AVSSIO = 0V,
V_AVDDIO = 10V
V_AVDDIO
– 0.4
V
Current Limit
Short to AVDDIO
Short to AVSSIO
75
mA
75
mA
Note 2: Electrical specifications are production tested at T_A = +25°C. Specifications over the entire operating temperature range are
guaranteed by design and characterization. Typical specifications are at T_A = +25°C.
Note 3: DC accuracy specifications are tested for single-ended ADC inputs only.
Note 4: The effective ADC sample rate for port X configured in mode 6, 7, or 8 is:
[ADC sample rate per ADCCONV]/(([number of ports in modes 6,7,8] + [1 if TMPSEL ≠ 000]) x [2^{# OF SAMPLES for port X}])
Note 5: See the Recommended VDDIO/VSSIO Supply Selection table for each range. For ports in modes 6, 7, 8, or 9, the voltage
applied to those ports must be within the limits of their selected input range, whether in single-ended or differential mode.
Note 6: Specification is guaranteed by design and characterization.
Note 7: Switch controlled by GPI-configured port. One switch terminal connected to 0V, the other terminal connected to 5V through
a 5mA current source. Timing is measured at the 2.5V transition point. Turn-on and turn-off delays are measured from the
edge of the control signal to the 2.5V transition point. Turn-on and turn-off durations are measured between control signal
transitions.
Note 8: In DAC-related modes, the rate, at which PIXI ports configured in mode 1, 3, 4, 5, 6, or 10 are refreshed, is as follows:
1/(40µs x [number of ports in modes 1, 3, 4, 5, 6, 10])
Note 9: Typical (TYP) values represent the errors at the extremes of the given temperature range.
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