MAX11311 Datasheet, PDF (41/51 Pages) Maxim Integrated Products – PIXI, 12-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO

MAX11311
PIXI, 12-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
Port Configuration Registers (Read/Write)(continued)
BIT
15:12
FIELD NAME
FUNCID_0[3:0]
FUNCID_1[3:0]
FUNCID_2[3:0]
FUNCID_3[3:0]
FUNCID_4[3:0]
FUNCID_5[3:0]
FUNCID_6[3:0]
FUNCID_7[3:0]
FUNCID_8[3:0]
FUNCID_9[3:0]
FUNCID_10[3:0]
FUNCID_11[3:0]
DESCRIPTION
Functional mode for port i (0≤i≤11)
• When switching from one mode to another, it is recommended to first switch to the high-
impedance mode. The duration for which the device may need to stay in the transitional high-
impedance mode depends on the application and hardware configuration.
• 0000: Mode 0 - High impedance
• The port is configured in high-impedance mode.
• 0001: Mode 1 - Digital input with programmable threshold, GPI (Figure 7)
• The port is configured as a GPI whose threshold is set through the DAC data register.
The DAC data register for that port needs to be set to the value corresponding to the
intended input threshold voltage. Any input voltage above that programmed threshold is
reported as a logic one. The input voltage must be between 0V and 5V.
• To avoid false interrupts, the port’s GPIERMSK register bit must be asserted. The DAC
data register can then be set for the desired threshold voltage. It may take up to 1ms
for the threshold voltage to be effective. The port’s GPIMD register bit is set next. At that
point, GPIERMSK can be deasserted for the port to start detecting events. The data
resulting from the comparison between the threshold voltage and the voltage at the port
can be read from the corresponding GPIDAT register bit.
• 0010: Mode 2 - Bidirectional level translator terminal (Figure 10)
• Any pair of adjacent ports can form a bidirectional level translator path. Only the lower
index port of the pair needs to be configured to enable this mode. The other port (index
+ 1) must be set in high-impedance mode.
• Ports 5 and 11 cannot be set in mode 2.
• The activity on this port is observable through its GPI path. The GPI-related registers are
configured as described for mode 1.
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