TMS320C6452_13 Datasheet, PDF (96/181 Pages) Texas Instruments – TMS320C6452 Digital Signal Processor

TMS320C6452
SPRS371F – OCTOBER 2007 – REVISED APRIL 2012
DSP
INTERRUPT
EVENT NUMBER
41
42
43
44
45-49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
Table 6-26. DSP Interrupt Events (continued)
EVENT
INTERRUPT SOURCE
Reserved
GPIO_BNK1_INT
AXINT
ARINT
VINT
GPINT0
GPINT1
GPINT2
GPINT3
GPINT4
GPINT5
GPINT6
GPINT7
GPINT8
GPINT9
GPINT10
GPINT11
GPINT12
GPINT13
GPINT14
GPINT15
TINT0L
TINT0H
TINT1L
TINT1H
EDMA3CC_INT0
EDMA3CC_INT1
EDMA3CC_INT2
EDMA3CC_INT3
EDMA3CC_INT4
EDMA3CC_INT5
EDMA3CC_INT6
EDMA3CC_INT7
EDMA3CC_ERRINT
EDMA3CC_MPINT
EDMA3TC0_ERRINT
EDMA3TC1_ERRINT
EDMA3TC2_ERRINT
EDMA3TC3_ERRINT
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(GPIO16:31) GPIO Bank 1 Interrupt event
TX Interrupt McASP
RX Interrupt McASP
Reserved
VLYNQ Pulse Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt event
GPIO Interrupt
GPIO Interrupt
GPIO Interrupt event
GPIO Interrupt event
Timer interrupt low event
Timer interrupt high event
Timer interrupt low event
Timer interrupt high event
EDMA3CC Completion Interrupt - Mask0 event
EDMA3CC Completion Interrupt – Mask1 event
EDMA3CC Completion Interrupt – Mask2 event
EDMA3CC Completion Interrupt – Mask3 event
EDMA3CC Completion Interrupt – Mask4 event
EDMA3CC Completion Interrupt – Mask5 event
EDMA3CC Completion Interrupt – Mask6 event
EDMA3CC Completion Interrupt – Mask7 event
EDMA3CC Error Interrupt event
EDMA3CC Memory Protection Interrupt event
EDMA3TC0 Error Interrupt event
EDMA3TC1 Error Interrupt event
EDMA3TC2 Error Interrupt event
EDMA3TC3 Error Interrupt event
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
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Peripheral Information and Electrical Specifications
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